Products - GPLB37A5



GPLB37A5 Copy Link.


Working Voltage (V)Max. CPU Speed (MHz)ROM (Byte)RAM (Byte)I/OCOMxSEG OptionBiasDutyAudio Output32K OSC.Serial I/FBus I/FSPI/UARTWDTLVD/LVR
2.4~5.55256K12162816X74, 32X641/5, 1/61/16, 1/32PWM/DACROSC/X'TAL--/√√/√



General Description


The GPLB37A5, an 8-bit CMOS microprocessor, contains 1216 bytes of working RAM, 256K bytes of ROM, 28 I/Os, interrupt/wakeup controller, UART for serial communication and Serial SRAM interface for memory expansion, and automatic display controller/driver for LCD. It also features one PWM/DAC driver with two audio channels to produce attractive sound effects easily. Its large ROM area can be used to store both program and audio data. The built-in UART speeds up data transmission between two devices. Furthermore, a SLEEP (power-down) function is also built in to extend power life. The GPLB37A5 is designed with GENERALPLUS state-of-the-art technology to fulfill LCD application needs, specifically for hand-held products.


Features

  • Built in 8-bit processor
  • 1216 bytes of SRAM
  • 256K bytes of ROM
  • Max. operating speed:
    4.0MHz @ 2.4V - 3.6V
    5.0MHz @ 3.6V - 5.5V
  • Programmable CPU clock: /1, /2, /4, /8, /16, /32, /64 of ROSC Frequency.
  • 6 wake-up sources
  • 7 interrupt sources
  • Universal Asynchronous Receiver and Transmitter (UART)
  • Serial SRAM interface
  • Key scan function
  • SEG[15:0] can be used to send key scan output
  • Programmable LCD driver
  • 74 segments, 16 commons, maximum 1184 dots or
    64 segments, 32 commons, maximum 2048 dots
  • 1/5, 1/6 bias; 1/16, 1/32 duty capability
  • 296 bytes dedicated LCD RAM
  • Built-in voltage regulator to generate VLCD for LCD driver
  • 32-level contrast control (2.45V - 5.75V, in 1/5 bias)
    32-level contrast control (2.95V - 6.85V, in 1/6 bias)
  • Power saving SLEEP mode
  • Low Voltage Detector
  • 8-level 2.9V - 2.2V/4.35V - 3.3V detection
  • 2.2V Low voltage reset
  • Low power consumption:
  • 600mA typical @ 3.0V, FCPU = 1.0MHz, FOSC = 4.0MHz
  • 25mA typical halt current @ 3.0V
  • <1mA typical standby current @ 3.0V
  • Peripherals
  • Max. 28 I/O pins (PA[7:0], PB[5:0], PC[7:0], PD[5:0])
  • Dedicated I/Os: PA[0:5]
  • Shared pin I/Os:
    PA[6:7] / SEG[63:62]
    PC[0:1] / SSRAM SCK, SDA/SEG[61:60]
    PC[3:2] / UART Rx/Tx
    PC[4:7] / SEG[73:70] / COM[25:22]
    PB[0:5] / SEG[69:64] / COM[21:16]
    PD[0:5] / COM[31:26]
  • 32.768KHz oscillator circuit for RTC
  • RC-oscillator (only one resistor is needed)
  • Two 16-bit reloadable timer/counters
  • 8-bit DAC resolution, 2-channel PWM/DAC audio outputs
  • Watchdog Timer for reliable operation  
  • Wide operating voltage range:
  • 2.4V - 3.6V
  • 3.6V - 5.5V

Data Sheet

GPLB37A5V10_ds.pdf   Copy Link.

Confirmation Sheet

GPLB37A5V10_cm.pdf   Copy Link.

Application / Engineering Note

AN0213-VDD higher than VLCD issue application note-16.pdf   Copy Link.
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