Products - GPM8FD3331B



GPM8FD3331B Copy Link.


PackageMemory (Byte) Flash/ EEPROMMemory (Byte) RAM IDM/XDMTimer CCP 16bitCPU Iosc MhzCPU Xtal MhzPeripheral IOPeripheral PWMPeripheral OPPeripheral CMPPeripheral ADC 12bPeripheral UART/SPI/I2CPeripheral PreDriver for SOCNote
QFN4832K256/3K365.3824826232131/1/1V=2.4~5.5V LVR:12.4V, 2.8V, 3.2V, 4.2V



Features

  • CPU
    • High speed and high performance 1T 8051-based CPU
  • 100% software compatible with industry standard 8051
  • Pipeline RISC architecture enables to execute instructions 10 times faster than standard 8051
  • Up to 65.3824MHz clock operation
  • Memories
    • 3K bytes XRAM
    • 256 bytes internal Data Memory (IDM) SRAM
    • 32K bytes FLASH with high endurance
  • Minimum 100,000 program/erase cycles
  • Minimum 10 years data retention
  • 512 Byte page size
    • Programmable read only level for software security
  • Clock Management
    • Internal oscillator: 8MHz±2% @ 4V~5.5V
    • Internal oscillator with PLL : 65.3824 / 63.85 / 60.019 / 52.357 MHz
    • Crystal input with 8MHz
    • Internal oscillator: 32KHz ± 50% @ 4V~5.5V
  • Power Management
    • One Sleep mode for power saving
  • Interrupt Management
    • 12 interrupt sources
    • 2 external interrupt sources
  • Reset Management
    • Power On Reset (POR)
    • Low Voltage Reset (LVR)
    • Pad Reset (PAD_RST)
    • Watchdog Reset (WDT_RST)
    • Software Reset (S/W_RST)
    • FLASH Access Error Reset (ADDR_ERR_RST)
  • Programmable Watchdog Timer
    • A time-base generator
    • An event timer
    • System supervisor
  • Three Ops
    • Include Internal gain
    • Include resistance between OP_O and CMP_N/ CMP_P input path
  • Two Comparator
    • Programmable hysteresis and de-bounce select
    • Programmable input source select.
  • I/O Ports
    • M 26 multifunction bi-direction I/Os
    • Each incorporates with pull-up resistor, pull-down resistor, output high, output low , output driving capability and floating input, determined by user’s settings at the corresponding registers
    • I/O ports with 15mA or 8mA current sink @ VDD = 5V
    • I/O ports with 15mA or 8mA current drive @ VDD = 5V
  • Two 16-bit Timers/Counters (Timer 0/1)
    • Timer mode with selectable clock source
    • Auto reload 8-bit timers
  • Three Powerful Timers: TimerA / TimerB / TimerC, with 16-bit Compare / Capture / PWM Unit
    • Timer mode with selectable clock source
    • Auto-reload 16-bit timers
    • Event capturing
    • Pulse width modulation and measurement
    • TimerA providing 4-channel PWM/Capture
    • TimerB providing 2-channel PWM/Capture
    • TimerC providing 2-channel Capture
  • UART0
    • One synchronous mode
    • Three asynchronous modes
  • SPI (master / slaver mode)
    • Programmable phase and polarity of master clock
    • Programmable master SPI clock frequency
  • I2C (master / slaver mode)
    • Programmable master I2C clock frequency
    • Max I2C clock: 400 KHz
  • A/D Converter
    • One 13-channel 12-bit resolution ADC
    • Supports programmable sample & hold and ADC clock function
    • Control independent per set
    • Internal VSS channel
    • Supports Offset calibrate
    • Supports direct memory access from ADC to XRAM
  • Built-in Low Voltage Reset
    • Trigger level: 2.4V, 2.8V, 3.2V, 4.2V
  • Built-in Low Voltage Detect
    • Programmable level: 2.6V, 3.0V, 3.4V, 4.4V
  • Synchronous MOSFET Gate Driver
    • Built in adjustable dead time control for short-through protection
    • Built in bootstrap P-CH MOSFET inside the chip
    • Built in thermal shutdown protection
  • On-chip Debug Unit
    • C-language compatible development tools

Please input the answer before download.