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Products - GPCD2TP020A


Real Chip64(OTP)20 Port A/B/D122-CHVVVV207

General Description

GPCD2TP020A series features a 64K-byte internal OTP ROM, maximum of 512-byte SRAM, three 12-bit timers, 20 general I/Os, and one 14-bit audio push-pull driver. GPCD2TP020A operates in a broad range of working voltage from 2.2V through 5.5V along with low voltage reset function. In addition, a sleep mode is designed to save powers for those applications with limited power resources available. In audio processing, speech can be mixed into one output. A Serial Peripheral Interface (SPI) controller is also included to facilitate communication with other devices and components.


  • 8-bit micro-processor
  • 512-byte SRAM
  • Operating voltage: 2.2V – 5.5V
  • Max. of CPU operating speed : 8.0MHz (Fosc=16MHz)
  • Five wakeup sources
  • 17 IRQs & 6 NMI Interrupts
  • Internal built-in regulator to supply core power
  • Two software channels with noise filter for high quality sound playback
  • Low Voltage Detection
  • 8-level (2.2V/ 2.4V/ 2.6V/ 2.8V/ 3.0V/ 3.2V/ 3.4/ 3.6V) voltage detector
  • Low Voltage Reset
  • Peripherals
    • 20 I/O pins (IOA[7:0], IOB[7:0], IOD[7:4])
    • 12 I/Os with high sink current
    • Key wakeup/interrupt function
    • 32.768KHz oscillator circuit for real time clock function (X’tal or R-osc)
    • Built-in R-oscillator (external resistor is needed), X’tal or internal R-oscillator (only 16MHz available for IOSC) for system operating clock
    • Internal time base generator
    • Three 12-bit timer/counter, TMA with capture and comparison function, TMB/TMC with comparison function (Programmable and auto reload)
    • Watchdog function
    • 14-bit PUSH-PULL driver for driving speaker directly
    • IR output
    • 12 hardware PWMIOs
    • One SPI serial interface I/Os
    • Hardware Touch function
    • One set built-in comparator with PGA.
  • Sleep mode to reduce power

Data Sheet

GPCD2TP020AV12_ds.pdf   Copy Link.

Confirmation Sheet

GPCD2TV11_cm(epdf).pdf   Copy Link.
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