|Working Voltage (V)||Max.CPU Speed (MHz)||ROM (Byte)||RAM (Byte)||I/O||Audio Output (DAC)||H/W MIDI Channel (SPU)||S/W Channel (16 bit PCM)||CPU CLK OSC. ROSC||CPU CLK OSC. X'TAL||WDT||RTC Clock||LVR||ADC||SPI||PWM IO||High Sink Current I/O|
GPCD9002A is ROMless and workable up to 4M bytes external ROM, 512 bytes working SRAM, three sets of 12-bit timers, 32 general I/Os, one 10-bit ADC with 8 channels input and one 14-bit DAC with push-pull amplifier. The microprocessor can implement software based on audio processing, function control and others. For audio processing, melody and speech can be mixed into one output. GPCD9002A is implemented with a high performance SPU voice engine to play maximum 8-channel voice with ADPCM/PCM data. It operates over a wide voltage range of 2.4V - 5.5V and includes Low Voltage Reset function. In addition, GPCD9002A provides sleep mode for power savings. It can be waked up from sleep mode by interrupt sources or by IO's state change. There is a Serial Peripheral Interface (SPI) controller built-in GPCD9002A to facilitate communicating with other devices and components.