General Description
The GPTC6608A, a new micro-controller for caller ID, vocal dialer, and SMS products, carries SUNPLUS newest 16-bit μ'nSPTM CPU technology. The μ'nSPTM 1.1 high processing speed assures that the GPTC6608A is able to facilitate the sophisticated digital signal processing. In addition to the advanced μ'nSPTM 1.1 technology, other primary functions include RAM, ROM, I/O, interrupt controller, two timer/counters, built-in LCM interface, serial flash/SRAM interface, UART/IrDA interface, 10-bit Analog-to-Digital Converter (ADC), Dual-Tone-Multi-Frequency (DTMF) generator, and 10-bit Digital-to-Analog Converter (DAC) output. For power savings, a software controllable standby mode and adjustable CPU clock are able to achieve the best power management.
An external 32768Hz crystal oscillator produces a steady time base for clock function. With the built-in DTMF generator, the telephone dialer function can be implemented.
The GPTC6608A can be widely used in telecom products such as multifunction telephone dialer with/without Caller Identification and general-purpose controller. The GPTC6608A provides, not only the latest telecom technology, but also the full service and support of GENERALPLUS.
Features
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SUNPLUS 16-bit μ'nSP™ 1.1 CPU
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SRAM 4K x 16 bits (internal), 24K x 16 bits (external)
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ROM 382K x 16 bits (internal), 2012K x 16 bits (external)
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Clock (max. CPUCK=28MHz)
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An external 32768Hz crystal for dialing and demodulation
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Built-in RC-oscillator and XTAL oscillator for CPU clock
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/1,/2,/4,/8 of RC-oscillator clock output for CPU
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/1,/2,/4,/8,/16,/32,/64 of XTAL oscillator clock output for CPU
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Operating voltage
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CPU operating voltage : 2.2V – 3.6V
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AFE operating voltage : 2.2V – 3.6V
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Operation Modes
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Operating mode, Standby mode, and Halt mode
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Timer/Counter
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Two 16-bit timers/counters
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Power management for system reliability
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Low-Voltage-Reset function
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Power-On-Reset function
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8-level battery voltage detect
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Watchdog reset (derived from 32768Hz crystal)
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12 Interrupt / Wakeup Sources (INT / WP)
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IOA[7:0]/IOE[7:0], IOC[1:0] edge-triggered
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Ring Detect / Line Signal Detector
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UART / IrDA Ready
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Timer A / Timer B overflow
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T32KHz,T2KHz,T128Hz,T8Hz (derived from 32768Hz)
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LCD Driver
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built-in SPLC501 LCM interface
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SPLC501 : 65 COMs x 132 SEGs
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up to 40 I/Os max.
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IOA[5:0]/IOE[5:0]:programmable pull-high, wakeup / INT
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IOA[7:6]/IOE[7:6]:programmable pull-high/low, wakeup / INT
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IOB[5:0]:COMS output, IOB[7:6] NMOS open drain
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IOC[4:0]:COMS output, IOC[7:5], NMOS open drain
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IOD[7:0] : CMOS I/O
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IOD[1] : CMOS I/O, can be programmed as TONE output
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Analog Front End
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Op amp for the twisted pair telephone line
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5-stage programmable PGA
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10-bit A/D, with sample-rate up to 16KHz, 4 input channels
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Built-in microphone amplifier and AGC
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DTMF / FSK demodulation and CAS tone detection
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Object code of DTMF and FSK decoders provided
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Compatible with Bell 202, and ITU V.23 FSK specifications
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FSK/DTMF decoder auto-select function
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Digitized algorithm for CAS tone detection
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Miscellaneous
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Built-in DTMF generator
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Ring / Line Signal Detector
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2 DAC output pins for DTMF output and melody / speech
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Multiplication with cumulative addition for user's digital filters
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Built-in UART and IrDA interface