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GP327902B

Description
Document
Tools
Sample Code
Video

Shipment form	CPU	Internal RAM	DRAM Type	NAND Flash (SLC & MLC) Error Correction Accelerator	Cards: SDC/MMC Controller (Secure Disk, Mulit-Media Card)	USB 2.0/1.1 Host/Device	LCD	TV Out	Graphic Engine	Sound Engine: SPU (Sound Process Unit)	Camera:Image Sensor Interface	Camera:CDSP (Image Signal Processor)	Camera:Face Recognition	UART/IrDA	SPI	I2C	I2S	DAC	ADC	AES Encyption/Decryption Hardware	RTC	PWM I/O	maximum GPIO number	Multimedia Codec
LQFP64	ARM7 105.6MHz	1KB	SDR	NONE	x 1	● /● 1/1	TFT/CSTN/STN	NONE	NONE	NONE	CCIR656/CCIR601	NONE	NONE	x1	x1	NONE	NONE	16bit x 2	MIC/Line-in	NONE	● (indep. power)	1	45	Video/Image/Audio

General Description

The GP327902B, a highly integrated SoC (System-On a Chip), offers a great cost-effective and high performance ratio solution for Multimedia Processor applications. It is embedded the ARM7TDMI with 4K-byte unified ID-cache and many tremendous features such as JPEG CODEC engine, TFT-LCD interface, CMOS sensor interface, scalar engine, SDRAM controller, UART interface, 4-channel DMA controller, 6-channel 16-bit timers, RTC, SD/MMC card interface, USB 2.0 mini-host/device, interrupt controller, SPI (master/slave) controller, programmable I/O ports, stereo 16-bit DAC for audio playback, 2-channel 12-bit ADC, MIC, PLL, and 1K-byte embedded SRAM. With a complete set of common system peripherals, the GP327902B chip minimizes overall system cost and no additional component needs to be added. Not only does GP327902B feature the high-speed performance, but it is also a cost-effective system and the most importantly - compatible with all ARM based programs.

Features

ARM7TDMI CPU with 4KB unified ID-cache, write buffer, embedded JTAG ICE, and working frequency up to 105.6MHz.
1KB SRAM for local data buffer.
JPEG CODEC.
- ISO/IEC 10918-1 baseline JPEG.
- High-speed Decoding and Encoding with resolution up to 8000x8000 64MPixel.
- Hardware Motion JPEG Decoding and Encoding (up to D1@30fps*1) for real-time video record and playback application.
Video-in & CMOS sensor interface and CCIR601/CCIR656 standard supported.
105.6MHz 16M-bit SDRAM inside
Four-channel DMA controller.
TFT-LCD controller.
- UPS051. (serial RGB)
- UPS052. (serial RGB dummy)
- I80 (8-bit/16-bit/18-bit system bus) I/F type.
- CCIR601/CCIR656.
- Scalar engine inside with programmable up-scaling and down-scaling factor.
Interrupt Controller.
Universal Serial Bus (USB) 2.0 high/full speed compliance device and USB mini-host with built-in transceiver.
Watchdog timer.
Six 16-bit timers/counters.
SD/SDHC/MMC card interface.
SPI (master/slave) interface with data rate up to 24Mbps.
UART (asynchronous serial I/O) interface with baud rate up to 1.8432Mbps and 115.2Kbps.
45 Programmable general I/O ports (GPIO) with pull-high/low control.
Power manager.
Built-in 3.0V to 1.8V Regulator.
Low voltage reset.
Real-time clock (RTC) with independent power supply.
105.6MHz PLL.
16-bit stereo DAC (2-channel) for audio playback.
12-bit ADC with 2 line-in channels.
MIC with PGA. (Programmable Gain Amplifier)