产品资讯 - GPM6P1916A

General Description

GPM6P1916A is designed for LCD remote control application with 256 bytes built-in SRAM and 16K bytes built-in OTP ROM.  It includes three timers and up to 41 software selectable general I/Os.  Additionally, it provides two frequency-programmable and duty- selectable Pulse Width Modulation (PWM) output, one for remote control, the other for user’s function application. It operates over a wide voltage range of VLVR - 3.6V and has a sleep mode for power saving mode, which retains the contents of RAM, but stops the oscillator to make all other chip functions to be inoperative.  The sleep mode can be released by using internal time based and external wakeup sources. This chip is applicable in many application fields such as low power watch and other LCD related products.  Meanwhile, the built-in IR transfer module can make IR control and usage easily.

Features

• CPU
  • 151 instructions
  • 13 addressing modes
  • Up to 4MHz clock operation
• Memories
  • 16K / 8K / 4K bytes program OTP ROM
  • 256 bytes RAM including stack area
• Reset Management
  • Enhanced reset system
  • Power On Reset (POR)
  • Low Voltage Reset (LVR)
  • Address Error Reset (ADR)
  • Software Reset (SWR)
  • Watchdog Reset (WDR)
• Interrupt Management
  • 13 internal interrupts
• I/O Ports
  • Up to 41 bi-direction tri-state I/O ports:
  • PortA[7:0]: with programmable pull high/ pull low, PA[6:0] share pads with SEGMENT[39:33]. PA[7] shares a pad with VPP.
  • PortB[7:0]: with programmable pull high/ pull low, PB[7:0] share pads with SEGMENT[7:0].
  • PortC[7:0]: with programmable pull high/ pull low, PC[7:0] share pads with SEGMENT[15:8].
  • PortD[7:0]: with programmable pull high/ pull low, PD[7:0] share pads with SEGMENT[23:16].
  • PortE[7:0]: with programmable pull high/ pull low.

PE[1:0] share pads with SEGMENT[25:24].

PE[5:2] share pads with SEGMENT[29:26]. / COM[7:4]

PE[7:6] share pads with SEGMENT[31:30] / C32O.C32I

• PortF[0]: with programmable pull high/ pull low,

PF[0] shares a pad with SEGMENT[32] / RESET

• I/O ports with 8mA current drive.
• I/O ports with 20mA current sink.

• Clock Management
  • Internal oscillator: 4MHz for system operation
  • 4MHz ± 1%, @ 25^oC with VDD = 0V
  • 4MHz ± 2%, @-20^oC~70^oC with VDD = V_LVR~3.6V
  • Internal oscillator: 32768Hz ± 1% @ 25^oC, VDD = 3.0V
  • Crystal input: 32768Hz @ V_LVR~3.6V
• Power Management
  • Two power saving modes: Sleep, Halt modes.
• LVR ( Low Voltage Reset )
  • LVR: Low Voltage Reset (V_LVR=1.8V / 1.7V ± 1V).
• Watch Dog
• Three timers
  • Timer A provides 15Hz~1MHz frequency controllable duty cycle with carrier signal in PWM mode.
  • Timer B is a general purpose 12-bit timer with selectable input clock.
  • 32K timer is a time base wake up source with selectable frequency.
• Wake up source
  • Key change wake-up from Sleep / Halt mode.
  • 32768 time base wakeup (TBHF/TBLF).
• PWM
  • 8-bit down count and auto reload.
  • Shadow transfer for the period.
  • Three independent channels for PWM output
  • Edge alignment counting schemes.
• ADC
  • Seven ADC channel input with 10-bit resolution
  • Supports programming sample hold and ADC clock function
  • Supports programming ADC data alignment output.
  • Supports ADC reference voltage general-purpose input.
• LCD
• Frame rate is around 85Hz.
• Support two types of LCD mode: extend-capacitance mode and resistance mode
• Programmable com and segment IO selection

Max support 6 commons x 33 segments (extend-cap mode)

Max support 6 commons x 38 segments (resistance mode)

• Extend-cap type supports:
  • Programmable V1X voltage selection.
  • 1/3 bias, 1/4 duty, 1/5 duty, 1/6 duty. V _{LCD =} 3* V
• Resistance type supports:
  • 1/3 bias, 1/4 duty, 1/5 duty, 1/6 duty. V _{LCD =} VDD
•  IR
• • Built-in IR TX able to drive IR LED:

1. 200mA driving capability @ V_REM=0.5V & VDD =3.0V.
2. 320mA driving capability @ V_REM=5V & VDD =3.0V.