GPL11B (OTP)*
| Working Voltage (V) | Max. CPU Speed (MHz) | ROM (Byte) | SRAM (Byte) | I/O | COMxSEG Option | Bias | Duty | Audio Channel | Tone Output(CH) | 32K OSC. | LVD | LVR |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2.6~5.5(LVR Enable), 2.4~5.5 (LVR Disable) | 4 | 8K | 128+48 | 16 I/O | 3x32, 4x32, 5x32, 8x32, 9x32, 10x30, 11x30, 12x30 | 1/2, 1/3, 1/4 | 1/3, 1/4, 1/5, 1/8, 1/9, 1/10, 1/11, 1/12 | - | 1 | √ (Pin Option) | - | √ |
General Description
Generalplus GPL11B is a CMOS 8-bit single chip Micro-controller containing LCD drivers, one-time programmable (OTP) ROM, SRAM, I/O, timer/counter, PLL/ROSC, audio/remote control out, and resistor to frequency converter (RFC) function, all in one chip.
The GPL11B is designed to drive LCD directly and perform efficient controller function as well as arithmetic function. With on-chip crystal oscillator, the real-time clock can be easily achieved.
For power savings, several power-down modes are controllable by software.
The GPL11B is widely used for low power electronic products, e.g. remote controller and general-purpose LCD controller.
For more information about how to program GPL11B OTP chip, please refer to Generalplus OTP/MTP Writer User's Manual.
Features
- Built-in Generalplus 8-bit CPU
- 128-byte SRAM
- 8K-byte OTP
- Working Voltage 2.4V ~ 5.5V (low voltage reset is disabled), 2.6V ~ 5.5V (low voltage reset is enabled)
- Maximum CPU speed 4MHz @ 2.4V
- CPU clock can be switched between High-Speed clock (PLL / R-oscillator) divided by 2 / 4 / 8 / 16 or Low-speed clock (32768Hz Crystal-oscillator / 32768 R-oscillator)
- Watchdog timer and illegal address reset circuit are always enabled and will reset CPU if these events occur
- Eight wakeup sources (37.9K/N, 32768/N, TMO, EXT1, EXT2, T2Hz, KEYC, NMI)
- Eight interrupt sources
- Dual clock sources:
- Dual clock sources are controlled by two clock option pins
- High-Speed clock sources: PLL/R-oscillator
- Low-speed clock sources: 32768 Crystal / 32768 R-oscillator
- PLL clock = 4.85MHz
- IR carrier frequency = 37.9KHz
- Maximum system clock in PLL clock mode = 2.42MHz
- Programmable LCD driver
- 48 byte Dual-port SRAM for LCD buffers
- LCD has 1/2 bias, 1/3 bias, 1/4 bias selections
- Maximum LCD 12x30 (360 dots), 11x30 (330 dots), 10x30 (300 dots), 9x32 (288 dots), 8x32 (256 dots), 5x32 (160 dots), 4x32 (128 dots), 3x32 (96 dots)
- A 16-bit re-loadable timer/counter
- Low voltage reset level is at 2.4V and can be disable by LVROFF pin
- Four Operating modes: Operating / WAIT / HALT /STANDBY
- Interrupt will wake CPU up
- Wakeup from CPU reset or next instruction is programmable
- Built-in RFC (Resistor to Frequency Converter) function
- I/O Port definition:
- 8 IOA, 4 shared pins with LCD Commons / Segments
- 8 IOB with key wakeup function, 5 shared pins with LCD Commons / Segments / V3 / CUP3 / CUP4
- Five Reset flags: watchdog, error address, power-on, external reset, and low voltage
- Low Power consumption:
- Operating current < 1mA @ 3.0V, CPU runs at 1.2MHz, 4.85MHz, PLL on
- Operating current < 500μA @ 3.0V, CPU run 1MHz, 2MHz, ROSC on
- Operating current < 20μA @ 3.0V, CPU run 32KHz, 32768 crystal on, PLL off
- Halt current < 2μA @ 3.0V, 1/8 duty, no load, 32768 crystal & LCD on, PLL & CPU off
- Serial OTP programming interface Needs only 7 pins for OTP programming: VDD, VSS, VPP, TEST, PIEP, SCK (SEG14), SDA (SEG13)
Note*: EV-board can not emulate IOB's output function.
Data Sheet
GPL11BV14_ds.pdf
Confirmation Sheet
GPL11BV21_cm(epdf).pdf
Application / Engineering Note
AN0028-GPL11B OTP Serial Programming Interface-16.pdf
AN0052-8 bit LCD un-expected image issue-16.pdf
AN0129-32768_Crystal_Oscillation_Application_Note-16.pdf