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GPTC6605A

Description
Document
Tools
Sample Code
Video

Working Voltage(V)	Max. CPU Speed(MHz)	ROM(byte)	RAM(byte)	I/O	Max. LCD Dots	COM xSEG Option	UART/IRDA	Timer	ADC	DAC	Tone Output	Battery Detect	FSK Decoder	DTMFTransceiver	Built-in DC-DC	SDRAM Interface
2.5~5.5	28	72K	3K	32	896	8x56 16 x56	‧/‧	2	‧	‧	‧	‧	‧	‧	-	-

General Description

The GPTC6605A, a newly invented micro-controller for caller ID type I / II services and vocal dialer products, carries SUNPLUS newest 16-bit μ'nSP^TM CPU technology. The μ'nSP^TM high processing speed ensures the GPTC6605A is able to facilitate the sophisticated digital signal processing. In addition to the advanced μ'nSP^TM technology, other primary functions include RAM, ROM, IO, interrupt controller, two timer/counters, LCD controller/driver, 10-bit Analog-to-Digital Converter (ADC), Dual-Tone-Multi-Frequency (DTMF) generator, melody Digital-to-Analog Converter (DAC) output, and UART/IrDA interfaces. For power savings, a software controllable standby mode and adjustable CPU clock can be used to achieve the best power management.
The GPTC6605A is able to drive LCD directly, and to perform complex function and arithmetic. An external 32768Hz crystal oscillator produces a steady time base for clock function. The flexible LCD controller and regulator make the LCD driver achieving the best display quality.
The GPTC6605A can be broadly used in telecom products such as multifunction telephone dialer with/without Caller Identification and CAS tone detection. The GPTC6605A provides, not only the latest telecom technology, but also the full service and support of GENERALPLUS.

Features

SUNPLUS 16-bit μ'nSP™ CPU
- SRAM 1.5K x 16 bits
- ROM 36K x 16 bits
Clock
- An external 32768Hz crystal for dialing and demodulation
- Built-in RC-oscillator and XTAL oscillator for CPU clock
- /1, /2, /4, /8 of RC-oscillator clock output for CPU
- /1, /2, /4, /8, /16, /32, /64 of XTAL oscillator clock output for CPU
Operating voltage
- External voltage (LVDD): 2.5V - 5.5V
- CPU operating voltage (VDD): 2.4V - 2.8V
- AFE operating voltage (AVDD): 2.4V - 2.8V
- Low Voltage Reset: 2.1V
Operation Modes
- Operating mode, Standby mode, and Halt mode
Timer/Counter
- One 16-bit timer/counter
- One 8-bit timer
Power management for system reliability
- Low-Voltage-Reset function
- Power-On-Reset function
- 8-level battery voltage detect
- Watchdog reset (derived from 32768Hz crystal)
12 Interrupt / Wakeup Sources (INT / WP)
- IOA[7:0], IOC[1:0] edge-triggered
- Ring Detect / Line Signal Detector
- UART / IrDA Ready
- Timer A / Timer B overflow
- T32KHz, T2KHz, T128Hz, T8Hz (derived from 32768Hz)
LCD Driver
- Typical 16 COM x 40 SEG (max. 56 SEGs)
- several SEG pins shared pad with IO ports
- bias: 1/4, duty: 1/8, 1/16
Up to 32 I/Os max.
- IOA[5:0]: programmable pull-high, wakeup / interrupt
- IOA[7:6]: programmable pull-high / low, wakeup / Interrupt
- IOB[5:0]: COMS output, IOB[7:6] NMOS open drain
- IOC[4:0]: COMS output, IOC[7:5], NMOS open drain
- IOD[7:0]: CMOS I/O
- IOD[1]: CMOS I/O, can be programmed as TONE output
- several I/O pins shared pad with SEGs and other functions
Analog Front End
- Op amp for the twisted pair telephone line
- 5-stage programmable PGA
- 10-bit A/D, with sample-rate up to 16KHz, 4 input channels
DTMF / FSK demodulation and CAS tone detection
- Object code of DTMF and FSK decoders are provided
- Object code of DTMF encoder is provided
- Compatible with Bell 202, and ITU V.23 FSK specifications
- FSK/DTMF decoder auto-select function
- Digitized algorithm for CAS tone detection
Miscellaneous
- Ring / Line Signal Detector
- 2 DAC output pins for DTMF output and melody / speech
- Multiplication with cumulative addition for user's digital filters
- Built-in UART and IrDA interface